Principal Engineer, NPU architect

Company:  Samsung Semiconductor
Location: San Jose
Closing Date: 26/10/2024
Salary: £150 - £200 Per Annum
Hours: Full Time
Type: Permanent
Job Requirements / Description

Please Note:

To provide the best candidate experience with our high application volumes, we limit applications to a total of 10 over 6 months.

Advancing the World's Technology Together
Our technology solutions power the tools you use every day-including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.

What You'll Do

The Advanced Controller Development (ACD) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash. ACD's vision is to solve key problems of Cloud & Data center by developing the new technology for storage (SSD) controller. We are an integral part of Samsung's strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.

We are looking for a dynamic, self-motivated Sr. Staff Engineer.

Come join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. You'll focus on enhancement of memory and storage capability by developing the prototype controller and optimize it for mass production.

Location: Hybrid, working onsite at our San Jose, CA office 3 days a week, with the flexibility to work remotely the remainder of your time.

Job ID : 42296

  • Drive architectural definition of NPUs (Neural Processing Unit) for data center AI application
  • Develop new architectures for low power, high performance
  • Lead PPA tradeoff analysis to achieve requirements
  • Work closely with compiler and software architects to come up with optimized architectural solutions
  • Participate in the development of NPUs
  • Work closely with design verification team for debug, to meet code and functional coverage targets

What You Bring

  • Bachelors in Electrical, Computer Science or related with 20+ years of experience or Masters in Electrical, Computer Science or related Science with 18+ years of Industry Experience or PhD in Electrical, Computer Science or related Science with 15+ years of working experiences in NPU architecture & development
  • Good knowledge and experience in architecture/design of NPUs
  • Good knowledge in CNN, Transformer Network
  • Well versed in processor architecture like ARM and RISC-V
  • Experience in ML frameworks (TensorFlow, PyTorch, ONNX)
  • Good knowledge in ML compilers
  • Experience in micro architecture of SoC, interface sub systems, logic modules.
  • Experience in complex logic designs and timing closure on the large sophisticated designs
  • Self-motivated problem-solver with an ability to work well in a team
  • You're inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You're collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.

Preferred skills:

  • Experience in HBM and interconnect IPs like CMN-700 and Ncore
  • Experience in modeling for performance/power estimates using SystemC/C++/Python
  • Good knowledge in ASIC design flow
  • Highly motivated with good verbal and written communication skills
  • Creativity in problem solving

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