As a Signal Integrity Technical Leader at Cisco, you will be at the forefront of designing and analyzing high-speed components, interfaces, and power distribution networks. You will define and design cutting-edge circuit boards (PCBs) and system interconnects, pushing the boundaries of technology. Your role will involve collaborating with a diverse team of system architects, ASIC engineers, CAD engineers, software engineers, and other SI experts to create the next generation of high-performance networking products. You will evaluate design tradeoffs, optimize performance, and ensure compliance with internal specifications and standards. Your work will include electromagnetic modeling, gigabit serial link design, power delivery network analysis, and physical measurements for design validation.
Who You'll Work With:
Join the dynamic and innovative Service Provider Signal Integrity Team! You'll be part of a passionate group driving high-speed system design, integration, validation, and characterization for the next generation of Cisco 8000 routers. Our team thrives on collaboration, creativity, and pushing the limits of technology. Together, we support each other in achieving excellence and delivering groundbreaking solutions.
Who You Are:
You are a self-motivated innovator with a strong desire to push the boundaries of technology. Your excellent teamwork and communication skills make you a valuable collaborator. You think outside the box and are always looking for new ways to innovate. Your expertise in electromagnetic simulation tools like HFSS and CST, combined with hands-on experience in high-speed PCB/package development, makes you a technical leader in your field. You have a deep understanding of high-speed NRZ and PAM4 Serdes, power integrity design, and lab measurement techniques. Your strong lab skills and measurement experience with tools like VNA, TDR, Real-Time Scope, and BERT set you apart.
MINIMUM REQUIREMENTS:
- BSEE combined with 12+ years of related experience.
- EM knowledge and expertise with EM simulation tools such as HFSS and CST.
- Hands-on experience with high-speed PCB/package development.
- Working experience with high-speed NRZ and PAM4 Serdes.
- Proficiency in power integrity design and analysis, and familiarity with PI simulation tools such as PowerSI/DC.
- Proven lab skills and measurement experience (VNA, TDR, Real-Time Scope, BERT).
PREFERRED REQUIREMENTS:
- PhD or MSEE combined with 7 to 10 years of related experience.
- Experience working directly with ASIC, package, and system design teams to evaluate design tradeoffs and optimize performance, risk, cost, and manufacturability.
- Experience in electromagnetic modeling of complex 3-dimensional structures.
- Experience in designing and analyzing gigabit serial links and ensuring compliance with internal specifications and standards.
- Experience in generating and verifying package layout rules and performing pre- and post-route signal integrity analysis of ASIC and PCB package designs.
- Experience in modeling and analyzing power delivery networks.
- Experience in conducting physical measurements to collect data for design validation and simulation correlations.