Lead Physical Design

Lead Physical Design Engineer: Innovus, Tempus, Voltus, Calibre DRC/LVS

Responsibilities:

• Contribute to automated design methodologies for ASIC physical design
• Perform ASIC physical design (synthesis, place-and-route), and sign-off (DRC/LVS) of mixed-signal SoCs
• Work with designers to integrate custom blocks into a digital toolflow
• Basic Qualifications:
• MS in Electrical Engineering, Computer Engineering or relevant fields focused on chip-level digital design (RTL and physical design)

Experience:

• US lead is expected to have 10+ years of work experience in physical design.
• History of assuming responsibility for a variety of technical tasks and completing projects independently
• Proficient in ASIC synthesis (RTL Compiler, Genus, Design Compiler), place-and-route (Encounter, Innovus, ICC), verification (NCSIM, VCS, ModelSim), and sign-off (DRC, LVS) tools
• Proficient in writing timing constraints and deep understanding of timing analysis

Experience working with version control software, such as Git