979 Jobs Found for rtl
Job description:We at Capgemini engineering are looking for a top-tier RTL Engineer. In this role you will be responsible to setup and run tools like LINT, CDC, RDC and X-propagation at both block and chip level. You will work closely with design team to consistently improve RTL quality and ready for synthesis and physical design. You will setup th...
10+ years of experience in RTL/Verilog writing. Have expertise in static checking like CDC, Lint, RDC, Spyglass DFT along with module integration e Logic design /micro-architecture /RTL coding Expertise in Verilog & System Verilog Experience in Synthesis /Understanding of timing concepts for ASIC is required. Experience in design of DDR / USB /SA...
Job description: We at Capgemini engineering are looking for a top-tier RTL Engineer. In this role you will be responsible to setup and run tools like LINT, CDC, RDC and X-propagation at both block and chip level. You will work closely with design team to consistently improve RTL quality and ready for synthesis and physical design. You will setup t...
Job Title: RTL design / Frond End Implementation Location: San Jose, CA OR Austin, TX (Onsite) Salary Range: $70-80/hr on W2 Job Type: Full-time Company Overview: HCL Technologies is a next-generation global technology company that helps enterprises reimagine their businesses for the digital age. Our technology products and services are bui...
General RTL and ASIC development Detailed module design, performance analysis and detailed design specification creation Participate in the RTL implementation, synthesis, formality check as well as ECOs Support post-layout timing closure and verification Improve Data & Command processing bandwidth, reduce latencies & increase reliability Suppo...
Role: ASIC/RTL Design Engineer Location: San Jose, CA – 95101 Duration: 12 months Top 3 skills: Good understanding of System Verilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documenta...
Role: ASIC/RTL Design Engineer Location: San Jose, CA – 95101 Duration: 12 months Top 3 skills: Good understanding of System Verilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documenta...
Job Title: RTL design / Frond End Implementation Location: San Jose, CA OR Austin, TX (Onsite) Salary Range: $70-80/hr on W2 Job Type: Full-time Company Overview: HCL Technologies is a next-generation global technology company that helps enterprises reimagine their businesses for the digital age. Our technology products and services are bui...
Job Title: RTL Design Engineer Duration: Full Time Location: Mountain View, CA Job description : Handle scripting (memory sweeps) - automation (python) Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience required. Logic design /micro-architecture / RTL coding is a must. Expertise in Verilog & System Verilog is a must. Experi...
Preferred Experience Excellent track record in designing IP's, Subsystems involving CPUs, bus interconnects. Working experience on Fetch Unit, MMU/IO-MMU, Load-Store, RISCV-Privilege Architecture, Advance Interrupt Architecture. Worked with IP's or Subsystem involving CPUs like RISC-V, ARM or x86 is a big plus. Knowledge of computer ar...