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112 Jobs Found for rtl in San Jose
Job Title: RTL design / Frond End Implementation Location: San Jose, CA OR Austin, TX (Onsite) Salary Range: $70-80/hr on W2 Job Type: Full-time Company Overview: HCL Technologies is a next-generation global technology company that helps enterprises reimagine their businesses for the digital age. Our technology products and services are bui...
Role: ASIC/RTL Design Engineer Location: San Jose, CA – 95101 Duration: 12 months Top 3 skills: Good understanding of System Verilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documenta...
Preferred Experience Excellent track record in designing IP's, Subsystems involving CPUs, bus interconnects. Working experience on Fetch Unit, MMU/IO-MMU, Load-Store, RISCV-Privilege Architecture, Advance Interrupt Architecture. Worked with IP's or Subsystem involving CPUs like RISC-V, ARM or x86 is a big plus. Knowledge of computer ar...
Role: ASIC/RTL Design Engineer Location: San Jose, CA – 95101 Duration: 12 months Top 3 skills: Good understanding of System Verilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documenta...
Job Title: RTL design / Frond End Implementation Location: San Jose, CA OR Austin, TX (Onsite) Salary Range: $70-80/hr on W2 Job Type: Full-time Company Overview: HCL Technologies is a next-generation global technology company that helps enterprises reimagine their businesses for the digital age. Our technology products and services are bui...
Role: ASIC/RTL Design Engineer Location: San Jose, CA – 95101 Duration: 12 months Top 3 skills: Good understanding of System Verilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have KEY RESPONSIBILITIES: Write micro-architecture documenta...
Job Title: RTL design engineerLocation: Bay Area, CA (Day 1 Onsite)Experience level: 8-10 yearsCandidate Roles and Responsibilities• Collaboration with offshore team.• IC role and offshore task coordination• Must have 10+ yr experience with ASIC design activities - Verilog RTL, testcase debug, netlist checks, CDC checks,coverage analysis, timing cl...
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinn...
Position Summary: We are seeking a highly skilled RTL Designer with experience in domains such as PCIe, NVMe, and ability to read 3rd party RTL. The ideal candidate will have a background in working with companies that develop SOC. This position requires working on-site for one of our clients in San Jose, California. Responsibilities: Develop and...
Job Type: Full Time Location: San Jose, California Date Posted: 2024-10-10 Job ID: V9083472 Join the Architecture and Design Team to enhance capabilities on Front End Design and Architecture. What you'll need: SoC Front End Lead with 12+ years of experience Micro-Architecture, RTL Design, Verification, RTL Quality checks, ...